Lediga jobb Xenergic AB i Lund

Xenergic is a high-tech semiconductor company providing cutting edge high-speed, low-power embedded memory IP solutions in advanced technology nodes. These memories are targeted for market segments ranging from IoT and mobile applications to high-end servers and AI accelerators.
Who we are looking for
We are looking for a highly motivated and talented Analog Layout Design Engineer with a proven track record in analog design to join our team and design the next generation of embedded memory solutions. As an Analog Layout Designer at Xenergic, you will work closely with a team of talented engineers and contribute to the development of next-generation products.


The key responsibilities include: design of leaf cells under tight area and integration constraints, porting of physical designs between technologies, optimization of blocks for EMIR mitigation, test chip design finishing on the DRC/LVS level, simulation and verification of designs, top level IP integration within SoC and any other step towards realizing the memory IP. Supporting customers and representing the company in trade shows and customer meetings can happen from time to time. The position requires tight collaboration with other team members from layout, analog, digital and coding teams.


The key requirements for the position are as follows:
M.Sc. in electronics engineering or related fields.
At least 3 years job experience in analog design in IC domain
Fluent in English both in writing and speaking
Good communication skills and ability to work in a team
Ability to drive complex tasks autonomously.



The following competences are not mandatory but would be beneficial:
Experience with advanced technology nodes such as single digit finFET is a big advantage.
Understanding of memory design and system level integration.
Experience with chip level DRC/LVS.
Experience with SoC verification and measurement.
EMIR-aware layout design concepts.
Understanding of the impact of layout on post-layout parasitics.
Scripting skills (python, shell); SKILL is a big plus.
Communication in Swedish.



Are you the one we are looking for? We want to hear from you! Send your application (CV and cover letter), or if you have any questions, via e-mail to [email protected].
We look forward to receiving your application! Visa mindre

Xenergic AB is a high-tech semiconductor company providing high-speed, low-power memory solutions in advanced technology nodes. These memories are targeted for market segment ranging from IoT and mobile applications to high-end servers. We are looking for a highly motivated Senior Digital Back-End Designer with a proven track record in digital circuit design to join our team to contribute to validating the next generation of embedded memory solutions. As a Senior Digital Designer at Xenergic, you will handle integrating memory blocks into designs, carefully debugging and validating front-end and back-end memory views, and leading the development and approval of test designs for fabrication in various technology nodes.
The key responsibilities in this position:
As a Digital ASIC Designer specializing in Physical Design (PnR) and Back-End Design, you will be responsible for:
Leading and participating in the physical design and implementation of digital ASICs.
Utilizing industry-standard EDA tools for synthesis, floor planning, place and route (PnR).
Implementing power grid, clock tree synthesis, and signal integrity optimization.
Conducting static timing analysis (STA) to meet timing closure requirements.
Collaborating with RTL designers and SRAM developers to ensure design goals are met.
Troubleshooting and resolving physical design-related issues.
Detecting and helping to debug the issues seen in the integration flow related to the memory views

Required Skills:
To be successful in this role, candidates should possess the following qualifications and skills:
Bachelor's degree or higher in Electrical Engineering, Computer Engineering, or a related field.
Fluency in English (Swedish not required)
Proven experience in ASIC physical design and back-end design (5yrs+), including deep submicron technologies (nm).
Proficiency in EDA tools such as Cadence (preferred), Synopsys, or Mentor Graphics for PnR.
Strong knowledge of clock tree synthesis, power grid design, and signal integrity analysis.
Familiarity with scripting languages like TCL, or Python for automation.
Solid understanding of ASIC design principles and methodologies.
Experience with static timing analysis (STA) and timing closure techniques.
Excellent problem-solving skills and attention to detail.
Effective communication and teamwork abilities.

Preferred Qualifications (Not Mandatory):
While not required, the following qualifications and experiences would be considered a plus:
Experience with advanced technology nodes (22nm, 16nm, 5nm, or below).
Expertise with Cadence design flow for PnR, timing closure and signing off the test designs.
Knowledge of DFT (Design for Test) principles. Visa mindre

About Xenergic
Xenergic is a high-tech semiconductor company providing cutting edge high-speed, low-power embedded memory IP solutions in advanced technology nodes. These memories are targeted for market segment ranging from IoT and mobile applications to high-end servers and AI accelerators.
We are looking for a very passionate Senior Digital Design and Verification Engineer to join our team.
Job Description:
As a Senior Digital Design and Verification Engineer, you will be responsible for the planning, design, integration, and verification of memory and digital blocks into test chips for tape-out. This role demands a strong background in RTL design, verification, and digital implementation—including scripting for automation, SystemVerilog, synthesis, and DFT—while optimizing for power, performance, and area (PPA).
You are expected to take initiative to ensure the test chip is both functionally correct and measurable, by addressing all relevant design and verification aspects such as power integrity, timing closure, and design-for-test (DFT). You will also contribute to the development of test patterns, testbenches, and BIST (Built-In Self-Test) to facilitate post-silicon validation.
Key Responsibilities:
Design and develop efficient digital blocks from specification to tape-out.
Perform RTL coding, synthesis, and PPA optimization.
Conduct functional verification including testbench creation, test case development, and debugging.
Collaborate with analog, software, and system teams to define and integrate system requirements.
Develop and implement robust verification strategies using SystemVerilog/UVM or similar methodologies.
Participate in design reviews and provide insights into architecture, verification, and design improvements.
Support the digital backend flow: floorplanning, physical synthesis, timing closure, and DFT integration.
Deliver test patterns and support post-silicon validation and measurement efforts.


Required Qualifications:
Master’s degree in Electrical Engineering, Computer Engineering, or a related field.
Minimum 5 years of experience in digital ASIC design and verification
Strong expertise in RTL design using Verilog or VHDL.
Proficiency in EDA tools such as Xcelium, ModelSim, VCS, and Genus.
Solid understanding of verification methodologies including SystemVerilog and UVM.
Experience with scripting languages (TCL, Python, or Perl) for design automation.
Familiarity with backend tools such as Cadence Innovus for place & route and optimization.
Knowledge of timing analysis, low-power design techniques, and DFT architecture.
Hands-on experience with physical implementation: floorplanning, PnR, STA, timing closure, and sign-off.
Excellent communication skills and ability to work effectively in a collaborative, cross-functional environment.
Good understanding of silicon bring-up and post-silicon validation workflows.

If you have any questions, or would like to send in your application (CV and cover letter), contact us by e-mail to [email protected].
We look forward to receiving your application. Visa mindre

Xenergic is a high-tech semiconductor company providing cutting edge high-speed, low-power memory solutions in advanced technology nodes. These memories are targeted for market segment ranging from IoT and mobile applications to high-end servers.
We are looking for a very passionate, highly motivated and talented post-Silicon design and verification engineer to perform different tests, measurements and verifications required for validations of our embedded memory solutions.
The key responsibilities in this position include: test chip design finishing on the DRC/LVS level, PAD integration, preparing the required test setup, detect and correct errors in the test setup for carrying out reliable measurements, performing measurements with high accuracy, post-process and summarising test results, and finally, high-quality documentation. The position will require tight collaboration with other team members from layout, analog, digital and coding teams.
The key skills required for the position are:
Master's degree or higher in electrical engineering or related fields
General understanding integrated circuit and memory design
Skilled in working with electronics test instruments such as logic analyzer, pattern generator, Oscilloscope, signal source and other related debug and analysis devices
Great scripting skills in Python for test automization and data processing
Good experience with PCB design, component selection and soldering of SMD components
Knowledge of Verilog/System Verilog and standard RTL simulators
Fluent in English both in writing and speaking
Good communication skills and ability to work in a team

The following competences are not mandatory but would be beneficial:
Prior work experience as post-silicon validation engineer
Basic know-how of CAD tools and ability to interact with analog team.
EMIR-aware layout design concepts
Understanding of the impact of layout on post-layout parasitic
Very good understanding of memory architecture and DFT interface.
Skilled in working with automation using Python, TCL and Makefiles.
Knowledge of circuit level simulators and equivalence checking between models and circuits.
Basic know-how of CAD tools and ability to interact with analog team.
Experience in schematic and layout design

Please send your application (CV and cover letter) or if you have any questions by e-mail to [email protected]. We look forward to receiving your application. Visa mindre

Xenergic AB is a high-tech semiconductor company providing cutting edge high-speed, low-power on-chip memory solutions in advanced technology nodes. These memories are targeted for market segment ranging from IoT and mobile applications to high-end servers. We are looking for a very passionate verification engineer to drive the verification flow of our integrated circuits and memory compiler.

The key skills required for the position are as follows:
Master's degree or higher in electrical engineering or related fields.
Very good understanding of memory architecture and DFT interface.
Knowledge of Verilog/System Verilog and standard RTL simulators
Skilled in working with automation using Python, TCL and Makefiles.
Knowledge of circuit level simulators and equivalence checking between models and circuits.
Basic know-how of CAD tools and ability to interact with analog team.
Fluent in English both in writing and speaking.
Good communication skills and ability to work in a team.


The following competences are not mandatory but would be beneficial:
Prior work experience as a verification engineer or experience in memory compiler flow.
Writing parsers in python for various formats of memory models
Experience in test and measurement instruments such as logic analyzer, pattern generator, Oscilloscope, signal source and other related debug and analysis device
Scripting skills in Python, C, bash & for test automization and data processing
Experience with PCB design, component selection and soldering of SMD components
Experience in schematic and layout design


We are looking for a highly motivated and talented verification engineer to join our team to work on the verification of our memory solutions. The key responsibilities in this position include memory model generation and equivalence check with circuit. Develop flow/regression and automation of memory model verification. Visa mindre

Xenergic AB is a high-tech semiconductor company providing cutting edge high-speed, low-power memory solutions in advanced technology nodes. These memories are targeted for market segment ranging from IoT and mobile applications to high-end servers. We are looking for a very passionate engineers to help with developing and verifying our tools and flows.
Who you are:
You are a person who thrives in a work environment where no day is like yesterday. You enjoy taking part in problem-solving in all kinds of domains, be it programming, electronics, math, or marketing.
To perform well in this position, you will need:
Solid programming experience in a professional setting, preferably in Python.
An engineering or software development based educational background.
Experience with versioning tools.
Experience with unit and Integration tests.

Further, experience in any of the following would be a merit:
Electronic circuit design
Embedded development
Cloud (AWS, Google Cloud, Microsoft Azure)
Web development
Shell scripting (Bash, csh, zsh, etc.) Visa mindre

Xenergic AB is a high-tech semiconductor company providing cutting edge high-speed, low-power memory solutions in advanced technology nodes. These memories are targeted for market segment ranging from IoT and mobile applications to high-end servers. We are looking for a very passionate post-Silicon test and validation engineer to perform different tests, measurements and verifications required for validations of our memory solutions.
The key skills required for the position are as follows:
Master's degree or higher in electrical engineering or related fields
General understanding integrated circuit and memory design
Skilled in working with electronics test instruments such as logic analyzer, pattern generator, Oscilloscope, signal source and other related debug and analysis devices
Great scripting skills in Python for test automization and data processing
Good experience with PCB design, component selection and soldering of SMD components
Fluent in English both in writing and speaking
Good communication skills and ability to work in a team
Knowledge of Verilog/System Verilog and standard RTL simulators?


The following competences are not mandatory but would be beneficial:
Prior work experience as post-silicon validation engineer
Basic know-how of CAD tools and ability to interact with analog team.?
Very good understanding of memory architecture and DFT interface.
Skilled in working with automation using Python, TCL and Makefiles.
Knowledge of circuit level simulators and equivalence checking between models and circuits.
Basic know-how of CAD tools and ability to interact with analog team.
Experience in schematic and layout design


We are looking for a highly motivated and talented test and validation engineer to join our team to work on the test and validation of our embedded memory solutions. The key responsibilities in this position include preparing the required test setup, detect and correct errors in the test setup for carrying out reliable measurements, performing measurements with high accuracy, post-process and summarizing test results, and finally, high-quality documentation. Visa mindre

We are looking for a highly motivated and talented design engineer to join our team to work on the next generation of memory solutions.
We at Xenergic provide cutting edge low-power on-chip memory solutions in industries most advanced technology nodes. Our new SoC designer position will be focusing on all aspects of development of SRAM, from digital modelling to analog designs. This position will be in tight cooperation with software team developing memory compiler.


Job Requirements:
-Experience with tool scripting and/or automation, SKILL, VHDL, front-end models
-PDK installation and customization
-Excellent custom circuit layout experience for on-chip SRAM and ROMs
-Strong understanding and debugging ability related to LVS/DRC/DFM
-Understanding of complex physical memory hierarchies
-M.SC. in electronics engineering or related fields and experience in advanced technology nodes
-Fluent in English both in writing and speaking


Merits
-Familiar with complete tapeout flow, from VHDL to Virtuoso Analog enviornment
-Python coding experience in big projects
-Swedish language.


In order to apply to the position, please send your CV and cover letter to [email protected]. You can use the same email address for further information or any related questions. Visa mindre